The present invention is generally directed to a system and method for level shifting signals within a range of frequencies. More specifically, the present invention is directed to a system and method for voltage level shifting signals in adjustably controlled manner to maintain a desired frequency response across their full range. The subject system and method thereby provide for such voltage level shifting of signals with the desired frequency response, while preserving low power consumption and low signal distortion.
Ongoing advances in the electronics industry continue to yield smaller device geometries and higher transfer speeds between circuit elements. Among other things, this has led to heightened sensitivities in transistor devices, whose breakdown voltages continue to creep ever lower, affording very little margin in the power supply voltage levels typically used for high speed integrated circuits. It is not uncommon for such high speed applications (for instance, in the range of Giga-samples/sec) to employ power supply voltages of about 1V, or even less. Since threshold voltages of transistor devices remain relatively high, however, a significant portion of the supply voltage magnitude may be consumed in actuating transistor devices. This may be so, even when a data signal is simply passed through a voltage follower or other such buffer structure. Unless recovered by suitable voltage level shifting, the downshift in voltage magnitude jeopardizes signal integrity.
While various voltage level shift circuits are known and widely used in the art, many either consume too much power or introduce too much distortion for at least some part of the signal frequency range at hand to be of optimal use. In certain high speed applications, for example, consistent voltage level shifting is needed across the full frequency range of input signals—from a substantially direct current (DC) level up through at least the applicable Nyquist frequency (½ the sampling rate to be applied) in order to suit subsequent sampling and processing operations. Yet, known voltage level shift circuits typically only provide level shifting for signals in just a part of the signal frequency range, or otherwise fail to provide a response that remains sufficiently consistent (or ‘flat’) across the full range of signal frequencies. At best, the frequency response of such known circuits may show acceptable response in one frequency region, with the response in another region being plagued by excessive attenuation.
A notable example is found in high speed sample and hold circuits, which often require substantial level shifting to recover for voltage loss in the sampled and held portion of an input signal. These circuits employ various open loop voltage buffer architectures to attain the required level of settling accuracy in a short period of time. Perhaps the most common architecture for high speed applications, especially in applications where the speed required is greater than the buffer's operational amplifier can provide, is one which employs a voltage follower topology. Since signals passing through a voltage follower undergo an attenuating voltage level shift—upward in gate-source voltage Vgs for a PMOS follower, or downward in gate-source voltage Vgs for an NMOS follower—the emerging signals must be restored by level shifting to preserve sufficient supply voltage margin. In the case of a differential signal, such level shifting would be effected in the common mode circuitry for each complementary component of the signal.
Most of the active high speed level shift approaches known require considerable power to maintain sufficiently high speed and linearity. As supply voltages drop below one Volt (such as in certain deep submicron processes, on the order of 28 nm for instance), these active level shift approaches become impractical. Consequently, many sample and hold architectures with level shift which had proven effective in the past with higher supply voltages now prove ineffective.
There is therefore a need for a system and method which provide ample level shifting across the full expected range of signal frequencies with low power consumption. There is a need for a system and method which provide such level shifting while preserving low distortion and maintaining a desired frequency response across the given signal frequency range. There is a need for such system and method which when implemented in a sample and hold application, minimize distortion for signals ranging substantially from DC and up to and beyond the expected Nyquist frequency (Fs/2) for subsequent sampling and processing measures.